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@@ -22,24 +22,28 @@
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void extmoduleSendNextFrame();
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void extmoduleStop() {
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void extmoduleStop()
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{
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TRACE("extmoduleStop");
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EXTERNAL_MODULE_OFF();
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CLEAR_BIT(EXTMODULE_TIMER->DIER, TIM_DIER_CC2IE);
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CLEAR_BIT(EXTMODULE_TIMER->CCER, TIM_CCER_CC2E);
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// Keep timer running because PPM IN uses the same one
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// Keep timer running because PPM IN uses the same timer
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// NVIC_DisableIRQ(EXTMODULE_TIMER_IRQn);
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EXTERNAL_MODULE_OFF();
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}
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void extmoduleTimerStart(uint32_t period, uint8_t state) {
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/**
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* EXTMODULE_TIMER is shared between PPM out and PPM in trainer
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* - init is the same.
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* - is never disabled, but rather channel outputs are disabled/enabled
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*/
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void extmoduleTimerStart()
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{
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TRACE("extmoduleTimerStart");
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if (state)
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EXTERNAL_MODULE_ON();
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else
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EXTERNAL_MODULE_OFF();
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// GPIO_PinAFConfig(EXTMODULE_TX_GPIO, EXTMODULE_TX_GPIO_PinSource, 0);
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// GPIO_InitTypeDef GPIO_InitStructure;
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@@ -51,34 +55,27 @@ void extmoduleTimerStart(uint32_t period, uint8_t state) {
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// GPIO_Init(EXTMODULE_TX_GPIO, &GPIO_InitStructure);
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// GPIO_SetBits(EXTMODULE_TX_GPIO, EXTMODULE_TX_GPIO_PIN); // Set high
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// EXTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN;
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// EXTMODULE_TIMER->PSC = EXTMODULE_TIMER_FREQ / 2000000 - 1; // 0.5uS (2Mhz)
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// EXTMODULE_TIMER->ARR = (2000 * period);
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// EXTMODULE_TIMER->CCR2 = (2000 * period) - 1000;
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// EXTMODULE_TIMER->EGR = 1; // Restart
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// EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF;
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// EXTMODULE_TIMER->DIER |= TIM_DIER_CC2IE; // Enable this interrupt
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// EXTMODULE_TIMER->CR1 |= TIM_CR1_CEN;
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// NVIC_EnableIRQ(EXTMODULE_TIMER_IRQn);
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// NVIC_SetPriority(EXTMODULE_TIMER_IRQn, 7);
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EXTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN;
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EXTMODULE_TIMER->PSC = EXTMODULE_TIMER_FREQ / 2000000 - 1; // 0.5uS
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EXTMODULE_TIMER->ARR = 65535;
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EXTMODULE_TIMER->CCR2 = GET_PPM_DELAY(EXTERNAL_MODULE) * 2;
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EXTMODULE_TIMER->CCR2 = GET_MODULE_PPM_DELAY(EXTERNAL_MODULE) * 2;
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EXTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_0;
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EXTMODULE_TIMER->BDTR |= TIM_BDTR_MOE;
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// Channel 1: PPM IN CC1 as input | frequency used to sample input
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EXTMODULE_TIMER->CCMR1 |= TIM_CCMR1_CC1S_0 | TIM_CCMR1_IC1F_1 | TIM_CCMR1_IC1F_0;
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EXTMODULE_TIMER->CCER |= TIM_CCER_CC1E | TIM_CCER_CC1P; // 01: inverted/falling edge
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EXTMODULE_TIMER->EGR = 1; // Restart
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WRITE_REG(EXTMODULE_TIMER->SR, ~(TIM_SR_CC1IF)); // Clear capture interrupt flag (PPMIN)
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EXTMODULE_TIMER->DIER |= TIM_DIER_CC1IE; // Enable capture interrupt (PPMIN)
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if (g_model.trainerMode == TRAINER_MODE_MASTER_TRAINER_JACK) {
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WRITE_REG(EXTMODULE_TIMER->SR, ~(TIM_SR_CC1IF)); // Clear capture interrupt flag (PPMIN)
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EXTMODULE_TIMER->DIER |= TIM_DIER_CC1IE; // Enable capture interrupt (PPMIN)
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EXTMODULE_TIMER->CCER |= TIM_CCER_CC1E | TIM_CCER_CC1P; // 01: inverted/falling edge
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}
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WRITE_REG(EXTMODULE_TIMER->SR, ~(TIM_SR_CC2IF)); // Clear compare interrupt flag (PPMOUT)
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EXTMODULE_TIMER->DIER |= TIM_DIER_CC2IE; // Enable compare interrupt (PPMOUT)
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if (moduleState[EXTERNAL_MODULE].protocol == PROTOCOL_CHANNELS_PPM) {
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WRITE_REG(EXTMODULE_TIMER->SR, ~(TIM_SR_CC2IF)); // Clear compare interrupt flag (PPMOUT)
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EXTMODULE_TIMER->DIER |= TIM_DIER_CC2IE; // Enable compare interrupt (PPMOUT)
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EXTMODULE_TIMER->CCER |= TIM_CCER_CC2E;
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}
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NVIC_EnableIRQ(EXTMODULE_TIMER_IRQn);
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NVIC_SetPriority(EXTMODULE_TIMER_IRQn, 2);
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@@ -106,13 +103,13 @@ void extmodulePpmStart()
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
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GPIO_Init(EXTMODULE_TX_GPIO, &GPIO_InitStructure);
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EXTMODULE_TIMER->CCER |= TIM_CCER_CC2E;
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extmoduleTimerStart();
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}
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inline void extmoduleSendNextFrame()
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{
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static bool delay = true;
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static uint16_t delay_halfus = GET_PPM_DELAY(EXTERNAL_MODULE) * 2;
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static uint16_t delay_halfus = GET_MODULE_PPM_DELAY(EXTERNAL_MODULE) * 2;
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if (moduleState[EXTERNAL_MODULE].protocol == PROTOCOL_CHANNELS_PPM) {
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//TRACE("extmodulePulsesData.ppm: %p",(void*)&extmodulePulsesData.ppm);
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//DUMP((uint8_t*)(extmodulePulsesData.ppm.pulses), 40);
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@@ -130,9 +127,9 @@ inline void extmoduleSendNextFrame()
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pulsePtr = extmodulePulsesData.ppm.pulses;
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// polarity 1 +
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// polarity 0 -
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EXTMODULE_TIMER->CCER = TIM_CCER_CC2E | (GET_PPM_POLARITY(EXTERNAL_MODULE) ? 0 : TIM_CCER_CC2P);
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EXTMODULE_TIMER->CCER = TIM_CCER_CC2E | (GET_MODULE_PPM_POLARITY(EXTERNAL_MODULE) ? 0 : TIM_CCER_CC2P);
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EXTMODULE_TIMER->CCR2 = EXTMODULE_TIMER->CCR2 + delay_halfus;
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delay_halfus = GET_PPM_DELAY(EXTERNAL_MODULE) * 2;
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delay_halfus = GET_MODULE_PPM_DELAY(EXTERNAL_MODULE) * 2;
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setupPulsesExternalModule();
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}
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delay = !delay;
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@@ -149,7 +146,8 @@ inline void extmoduleSendNextFrame()
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}
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}
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extern "C" void EXTMODULE_TIMER_IRQHandler() {
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extern "C" void EXTMODULE_TIMER_IRQHandler()
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{
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if (EXTMODULE_TIMER->SR & TIM_SR_CC2IF) { // Compare PPM-OUT
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EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF; // Clears interrupt on ch2
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if ((moduleState[EXTERNAL_MODULE].protocol == PROTOCOL_CHANNELS_CROSSFIRE && g_model.moduleData[EXTERNAL_MODULE].type != MODULE_TYPE_CROSSFIRE) ||
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