Release prep

Typo fix
Because omeone asked to to explain what means LDC today ...
2017-12-17 10:07:54 +01:00 · 2017-12-16 22:09:38 +01:00 · 2017-12-16 17:12:32 +01:00 · 2017-12-16 17:11:01 +01:00 · 2017-12-16 15:42:26 +01:00 · 2017-12-15 19:15:14 -05:00
10 changed files with 39 additions and 27 deletions
@@ -1297,4 +1297,7 @@ John Eppling
 Thierry Malosse
 Johann Antretter
 Jan Kaiser
- 
+Rachel Berkhahn
+Luca Massimiliano Comolli
+Mario Wesierski
+Evening Shade Pottery
@@ -45,7 +45,7 @@
      </sizepolicy>
     </property>
     <property name="currentIndex">
-      <number>1</number>
+      <number>0</number>
     </property>
     <widget class="QWidget" name="profileTab">
      <attribute name="title">
@@ -674,7 +674,7 @@ PACK(struct ModuleData {
      int8_t optionValue;
    } multi);
    NOBACKUP(struct {
-      uint8_t power:2;              // 0=10 mW, 1=100 mW, 2=500 mW, 3=1W
+      uint8_t power:2;                  // 0=10 mW, 1=100 mW, 2=500 mW, 3=1W
      uint8_t spare1:2;
      uint8_t receiver_telem_off:1;     // false = receiver telem enabled
      uint8_t receiver_channel_9_16:1;  // false = pwm out 1-8, true 9-16
@@ -157,8 +157,9 @@ const mm_protocol_definition *getMultiProtocolDefinition (uint8_t protocol);
 #define IS_R9M_OR_XJTD16(x)            ((IS_MODULE_XJT(x) && g_model.moduleData[x].rfProtocol== RF_PROTO_X16) || IS_MODULE_R9M(x))

 #define FAILSAFE_ROWS(x)               ((IS_MODULE_XJT(x) && HAS_RF_PROTOCOL_FAILSAFE(g_model.moduleData[x].rfProtocol)) || MULTIMODULE_HASFAILSAFE(x) || IS_MODULE_R9M(x))  ? (g_model.moduleData[x].failsafeMode==FAILSAFE_CUSTOM ? (uint8_t)1 : (uint8_t)0) : HIDDEN_ROW
-#define R9M_OPTION_ROW                 (IS_TELEMETRY_INTERNAL_MODULE() ? TITLE_ROW : (uint8_t) 0)
-#define EXTERNAL_MODULE_OPTION_ROW     (IS_MODULE_R9M(EXTERNAL_MODULE) ? R9M_OPTION_ROW : IS_MODULE_SBUS(EXTERNAL_MODULE) ? TITLE_ROW : MULTIMODULE_OPTIONS_ROW)
+#define R9M_FCC_OPTION_ROW             (IS_TELEMETRY_INTERNAL_MODULE() ? TITLE_ROW : (uint8_t)0)
+#define R9M_OPTION_ROW                 (IS_MODULE_R9M_FCC(EXTERNAL_MODULE) ? R9M_FCC_OPTION_ROW : TITLE_ROW)
+#define EXTERNAL_MODULE_OPTION_ROW     (IS_MODULE_R9M(EXTERNAL_MODULE) ? R9M_OPTION_ROW : (IS_MODULE_SBUS(EXTERNAL_MODULE) ? TITLE_ROW : MULTIMODULE_OPTIONS_ROW))
 #define EXTERNAL_MODULE_POWER_ROW      (IS_MODULE_MULTIMODULE(EXTERNAL_MODULE) || IS_MODULE_R9M_FCC(EXTERNAL_MODULE)) ? (uint8_t) 0 : HIDDEN_ROW

 void editStickHardwareSettings(coord_t x, coord_t y, int idx, event_t event, LcdFlags flags);
@@ -2814,7 +2814,7 @@ uint32_t pwrCheck()
      }
      if (get_tmr10ms() - pwr_press_time > PWR_PRESS_SHUTDOWN_DELAY) {
 #if defined(SHUTDOWN_CONFIRMATION)
-        while (1)
+        while (1) {
 #else
        while ((TELEMETRY_STREAMING() && !g_eeGeneral.disableRssiPoweroffAlarm)) {
 #endif
@@ -384,7 +384,7 @@ void setupPulsesPXX(uint8_t port)
  extra_flags |= (g_model.moduleData[port].pxx.receiver_telem_off << 1);
  extra_flags |= (g_model.moduleData[port].pxx.receiver_channel_9_16 << 2);
  if (IS_MODULE_R9M(port)) {
-    extra_flags |= (max(g_model.moduleData[port].pxx.power, IS_MODULE_R9M_FCC(port) ? (uint8_t)R9M_FCC_POWER_MAX : (uint8_t)R9M_LBT_POWER_MAX) << 3);
+    extra_flags |= (min(g_model.moduleData[port].pxx.power, IS_MODULE_R9M_FCC(port) ? (uint8_t)R9M_FCC_POWER_MAX : (uint8_t)R9M_LBT_POWER_MAX) << 3);
    // Disable S.PORT if internal module is active
    if (IS_TELEMETRY_INTERNAL_MODULE() || !g_model.moduleData[port].pxx.sport_out) {
      extra_flags |= (1 << 5);
@@ -657,7 +657,7 @@
  #define LCD_RST_GPIO                  GPIOD
  #define LCD_RST_GPIO_PIN              GPIO_Pin_15 // PD.15
  #define LCD_DMA                       DMA1
-  #define LDC_DMA_Stream                DMA1_Stream7
+  #define LCD_DMA_Stream                DMA1_Stream7
  #define LCD_DMA_Stream_IRQn           DMA1_Stream7_IRQn
  #define LCD_DMA_Stream_IRQHandler     DMA1_Stream7_IRQHandler
  #define LCD_DMA_FLAGS                 (DMA_HIFCR_CTCIF7 | DMA_HIFCR_CHTIF7 | DMA_HIFCR_CTEIF7 | DMA_HIFCR_CDMEIF7 | DMA_HIFCR_CFEIF7)
@@ -678,7 +678,7 @@
  #define LCD_RST_GPIO                  GPIOD
  #define LCD_RST_GPIO_PIN              GPIO_Pin_12 // PD.12
  #define LCD_DMA                       DMA1
-  #define LDC_DMA_Stream                DMA1_Stream7
+  #define LCD_DMA_Stream                DMA1_Stream7
  #define LCD_DMA_Stream_IRQn           DMA1_Stream7_IRQn
  #define LCD_DMA_Stream_IRQHandler     DMA1_Stream7_IRQHandler
  #define LCD_DMA_FLAGS                 (DMA_HIFCR_CTCIF7 | DMA_HIFCR_CHTIF7 | DMA_HIFCR_CTEIF7 | DMA_HIFCR_CDMEIF7 | DMA_HIFCR_CFEIF7)
@@ -85,17 +85,17 @@ void lcdHardwareInit()
  GPIO_PinAFConfig(LCD_SPI_GPIO, LCD_MOSI_GPIO_PinSource, LCD_GPIO_AF);
  GPIO_PinAFConfig(LCD_SPI_GPIO, LCD_CLK_GPIO_PinSource, LCD_GPIO_AF);

-  LDC_DMA_Stream->CR &= ~DMA_SxCR_EN; // Disable DMA
+  LCD_DMA_Stream->CR &= ~DMA_SxCR_EN; // Disable DMA
  LCD_DMA->HIFCR = LCD_DMA_FLAGS; // Write ones to clear bits
-  LDC_DMA_Stream->CR =  DMA_SxCR_PL_0 | DMA_SxCR_MINC | DMA_SxCR_DIR_0;
-  LDC_DMA_Stream->PAR = (uint32_t)&LCD_SPI->DR;
+  LCD_DMA_Stream->CR =  DMA_SxCR_PL_0 | DMA_SxCR_MINC | DMA_SxCR_DIR_0;
+  LCD_DMA_Stream->PAR = (uint32_t)&LCD_SPI->DR;
 #if defined(PCBX7)
-  LDC_DMA_Stream->NDTR = LCD_W;
+  LCD_DMA_Stream->NDTR = LCD_W;
 #else
-  LDC_DMA_Stream->M0AR = (uint32_t)displayBuf;
-  LDC_DMA_Stream->NDTR = LCD_W*LCD_H/8*4;
+  LCD_DMA_Stream->M0AR = (uint32_t)displayBuf;
+  LCD_DMA_Stream->NDTR = LCD_W*LCD_H/8*4;
 #endif
-  LDC_DMA_Stream->FCR = 0x05; // DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0;
+  LCD_DMA_Stream->FCR = 0x05; // DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0;

  NVIC_EnableIRQ(LCD_DMA_Stream_IRQn);
 }
@@ -187,10 +187,10 @@ void lcdRefresh(bool wait)
    LCD_A0_HIGH();

    lcd_busy = true;
-    LDC_DMA_Stream->CR &= ~DMA_SxCR_EN; // Disable DMA
+    LCD_DMA_Stream->CR &= ~DMA_SxCR_EN; // Disable DMA
    LCD_DMA->HIFCR = LCD_DMA_FLAGS; // Write ones to clear bits
-    LDC_DMA_Stream->M0AR = (uint32_t)p;
-    LDC_DMA_Stream->CR |= DMA_SxCR_EN | DMA_SxCR_TCIE; // Enable DMA & TC interrupts
+    LCD_DMA_Stream->M0AR = (uint32_t)p;
+    LCD_DMA_Stream->CR |= DMA_SxCR_EN | DMA_SxCR_TCIE; // Enable DMA & TC interrupts
    LCD_SPI->CR2 |= SPI_CR2_TXDMAEN;
  
    WAIT_FOR_DMA_END();
@@ -208,16 +208,16 @@ void lcdRefresh(bool wait)
  LCD_NCS_LOW();
  LCD_A0_HIGH();

-  LDC_DMA_Stream->CR &= ~DMA_SxCR_EN; // Disable DMA
+  LCD_DMA_Stream->CR &= ~DMA_SxCR_EN; // Disable DMA
  LCD_DMA->HIFCR = LCD_DMA_FLAGS; // Write ones to clear bits

 #if defined(LCD_DUAL_BUFFER)
  // Switch LCD buffer
-  LDC_DMA_Stream->M0AR = (uint32_t)displayBuf;
+  LCD_DMA_Stream->M0AR = (uint32_t)displayBuf;
  displayBuf = (displayBuf == displayBuf1) ? displayBuf2 : displayBuf1;
 #endif

-  LDC_DMA_Stream->CR |= DMA_SxCR_EN | DMA_SxCR_TCIE; // Enable DMA & TC interrupts
+  LCD_DMA_Stream->CR |= DMA_SxCR_EN | DMA_SxCR_TCIE; // Enable DMA & TC interrupts
  LCD_SPI->CR2 |= SPI_CR2_TXDMAEN;
 #endif
 }
@@ -226,10 +226,10 @@ extern "C" void LCD_DMA_Stream_IRQHandler()
 {
  DEBUG_INTERRUPT(INT_LCD);

-  LDC_DMA_Stream->CR &= ~DMA_SxCR_TCIE; // Stop interrupt
+  LCD_DMA_Stream->CR &= ~DMA_SxCR_TCIE; // Stop interrupt
  LCD_DMA->HIFCR |= LCD_DMA_FLAG_INT; // Clear interrupt flag
  LCD_SPI->CR2 &= ~SPI_CR2_TXDMAEN;
-  LDC_DMA_Stream->CR &= ~DMA_SxCR_EN; // Disable DMA
+  LCD_DMA_Stream->CR &= ~DMA_SxCR_EN; // Disable DMA

  while (LCD_SPI->SR & SPI_SR_BSY) {
    /* Wait for SPI to finish sending data
@@ -455,8 +455,16 @@
 #define LEN_VSWASHTYPE                 "\004"
 #define TR_VSWASHTYPE                  "--- ""120 ""120X""140 ""90\0"

+#if defined(PCBHORUS)
+#define LEN_VKEYS                      "\006"
+#define TR_VKEYS                       "Menu\0 ""Exit\0 ""Entree""Haut\0 ""Bas\0  ""Droit\0""Gauche"
+#elif defined(PCBTARANIS)
 #define LEN_VKEYS                      "\005"
-#define TR_VKEYS                       TR("Menu\0""Exit\0""Bas\0 ""Haut\0""Droit""Gauch", "Menu\0""Exit\0""Enter""Page\0""Plus\0""Minus")
+#define TR_VKEYS                       "Menu\0""Exit\0""Enter""Page\0""Plus\0""Moins"
+#else
+#define LEN_VKEYS                      "\005"
+#define TR_VKEYS                       "Menu\0""Exit\0""Bas\0 ""Haut\0""Droit""Gauch"
+#endif

 #define LEN_VRENCODERS                 "\003"
 #define TR_VRENCODERS                  "REa""REb"
@@ -623,7 +631,7 @@
 #endif

 #if defined(PCBTARANIS)
-  #define TR_POPUPS                    TR_EXIT "\010" "\010" "\010" "\010" TR_ENTER
+  #define TR_POPUPS                    TR(TR_EXIT "\010" TR_ENTER, TR_EXIT "\010" "\010" "\010" "\010" TR_ENTER)
 #else
  #define TR_POPUPS                    TR_ENTER "\010" TR_EXIT
  #define OFS_EXIT                     sizeof(TR_ENTER)
@@ -6,7 +6,7 @@ branch=2.2
 docker=release22
 workdir=/home/opentx/release22
 output=/var/www/html/2.2
-version=2.2.0
+version=2.2.1

 cd ${workdir}
Author	SHA1	Message	Date
3djc	cca7180834	Release prep	2017-12-17 10:07:54 +01:00
Bertrand Songis	104ab8c7f3	Typo fix Because omeone asked to to explain what means LDC today ...	2017-12-16 22:09:38 +01:00
Bertrand Songis	e4d273aa0e	Update CREDITS.txt	2017-12-16 17:12:32 +01:00
Bertrand Songis	df61a1ab4e	Update CREDITS.txt	2017-12-16 17:11:01 +01:00
Raphael Coeffic	1dcd8cc419	small fixes for french translation (#5517 ) * fixed VKEYS french fixes #5481 * fix french confirmation popup fixes #5475	2017-12-16 15:42:26 +01:00
Max Paperno	b55b68f191	[Companion] Fix incorrect Settings dialog tab shown by default (closes #5511 ).	2017-12-15 19:15:14 -05:00
3djc	2c2339e229	Merge pull request #5514 from opentx/bsongis/r9m_navigation_issue R9M navigation issue (when external module is R9M-EU and internal mod…	2017-12-14 15:35:40 +01:00
Bertrand Songis	d7645252bb	Power issue with R9M (always max power) (#5513 )	2017-12-14 15:34:14 +01:00
3djc	dc89bb1dfc	Fix SHUTDOWN_CONFIRMATION compile	2017-12-14 07:58:31 +01:00
Bertrand Songis	47383fd053	Update CREDITS.txt	2017-12-13 22:15:32 +01:00
Bertrand Songis	f80406c7cb	R9M navigation issue (when external module is R9M-EU and internal module is OFF)	2017-12-13 22:13:40 +01:00